Microchip unveils the industry’s first Terabit-scale security

CHANDLER, Ariz., Sept. 19, 2022 (GLOBE NEWSWIRE) — The demand for greater bandwidth and security in network infrastructure, driven by the growth of hybrid work and geographic distribution of networks, is redefining borderless networking. Led by AI/ML applications, the total port bandwidth for 400G (gigabits per second) and 800G is expected to grow more than 50% annually, according to 650 Group. This dramatic growth extends the transition to 112G PAM4 connectivity from cloud-only data center and telecom service provider switches and routers to enterprise Ethernet switching platforms. Microchip Technology Inc. (NASDAQ: MCHP) is responding to this market change with the META-DX2 Ethernet PHY (physical layer) portfolio by introducing a new family of META-DX2+ PHYs. These are the industry’s first solutions to integrate 1.6T (terabits per second) end-to-end line-rate encryption and port aggregation to maintain the most compact footprint as they transition to 112G PAM4 connectivity for enterprise Ethernet switches, security appliances , cloud interconnect routers and optical transport systems.

“The introduction of four new META-DX2+ Ethernet PHYs demonstrates our commitment to support the industry’s transition to 112G PAM4 connectivity, enabled by our META-DX retimer and PHY portfolio. Combined with our META-DX2L retimer, we now offer a complete chipset for all connectivity needs, from retiming, gearbox to advanced PHY functionality,” said Babak Samimi, corporate vice president of Microchip’s communications business unit. “By offering compatibility with both hardware and software, our customers can leverage architectural designs for their enterprise, data center and service provider switching and routing systems that can provide pay-as-you-need activation of advanced features, including end-to-end security, multi-rate port aggregation, and accurate timestamping through a software subscription model.”

The META-DX2+’s configurable 1.6T datapath architecture outperforms the next closest competitor by 2X in total gearbox capacity and hitless 2:1 protection switch mux modes enabled by the unique ShiftIO capability. The flexible XpandIO port aggregation capabilities optimize router/switch port utilization while supporting low-rate traffic. The devices also include IEEE 1588 Class C/D Precision Time Protocol (PTP) support for accurate nanosecond time stamps required for 5G and enterprise mission-critical services. By offering a portfolio of footprint-compatible retimer and advanced PHYs with encryption options, Microchip enables developers to extend their designs to add MACsec and IPsec based on a common board design and Software Development Kit (SDK).

META-DX2+ differentiated capabilities include:

  • Dual 800 GbE, Quad 400 GbE and 16x 100/50/25/10/1 GbE MAC/PHY
  • Integrated 1.6T MACsec/IPsec engines that offload encryption from packet processors, making it easier for systems to scale to higher bandwidths with end-to-end security
  • Over 20% board savings compared to competing solutions that require two devices to deliver the same 1.6T gearbox and hitless 2:1 mux modes
  • XpandIO enables port aggregation of low-rate Ethernet clients over faster Ethernet interfaces, optimized for enterprise platforms
  • ShiftIO function combined with a highly configurable integrated junction allows flexible connectivity between external switches, processors and optics
  • Device variants with 48 or 32 Long Reach (LR) capable 112G PAM4 SerDes including programmability to measure power vs. optimize performance
  • Support for Ethernet, OTN, Fiber Channel and proprietary data rates for AI/ML applications

“As the industry transitions to a 112G PAM4 serial ecosystem for high-density routers and switches, line-rate encryption and port capacity efficiency are becoming increasingly important,” said Alan Weckel, founder and technology analyst at 650 Group, LLC. “Microchip’s META-DX2+ family will play an important role in enabling MACsec and IPsec encryption, optimizing port capacity with port aggregation, and flexibly connecting routing/switching silicon to multi-rate 400G and 800G optics.”

Like the META-DX2L retimer, the new series of META-DX2+ PHYs can be used with Microchip’s PolarFire® FPGAs, the ZL30632 high performance PLL, oscillators, voltage regulators and other components pre-validated as a system to get designs into production faster.

Development Tools

Microchip’s second generation Ethernet PHY SDK for the META-DX2 family reduces development costs with field-proven API libraries and firmware. The SDK supports all META-DX2L and META-DX2+ PHY devices within the product family. Support for the Open Compute Project (OCP) Switch Abstraction Interface (SAI) PHY extensions are included to enable agnostic support of the META-DX2 PHYs across a wide range of network operating systems (NOS) that support SAI.


The META-DX2+ family is expected to be sampled in the fourth calendar quarter of 2022. For more information, visit the META-DX2+ webpage or contact a Microchip sales representative.

See the META-DX2L Ethernet PHY at ECOC 2022

Microchip will be exhibiting the META-DX2L PHY device, which began sampling in Q4 2021, at the Optical Internetworking Forum (OIF) booth at the European Conference on Optical Communication (ECOC) September 18-22, 2022 in Basel, Switzerland. Microchip and other OIF members will demonstrate how multi-vendor interoperability accelerates industry solutions for the global network at booth #701 at Congress Center Basel.


High-res images available via Flickr or editorial contact (feel free to publish):
• Application image: www.flickr.com/photos/microchiptechnology/52336953308/sizes/l/

About microchip technology

Microchip Technology Inc. is a leading provider of smart, connected and secure integrated control solutions. The user-friendly development tools and extensive product portfolio enable customers to create optimal designs that reduce risk while lowering total system costs and time to market. The company’s solutions serve more than 120,000 customers in the industrial, automotive, consumer, aerospace and defense, communications and computing markets. Microchip, headquartered in Chandler, Arizona, offers excellent technical support along with reliable delivery and quality. For more information, visit the Microchip website at www.microchip.com.

Note: The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the US and other countries. All other trademarks mentioned herein are the property of their respective companies.

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